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» Optimal Testing of Reed-Muller Codes
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ERSA
2006
147views Hardware» more  ERSA 2006»
13 years 11 months ago
Code Partitioning for Reconfigurable High-Performance Computing: A Case Study
In this case study, various ways to partition a code between the microprocessor and FPGA are examined. Discrete image convolution operation with separable kernel is used as the ca...
Volodymyr V. Kindratenko
ICML
2007
IEEE
14 years 10 months ago
Learning distance function by coding similarity
We consider the problem of learning a similarity function from a set of positive equivalence constraints, i.e. 'similar' point pairs. We define the similarity in informa...
Aharon Bar-Hillel, Daphna Weinshall
AAAI
2008
14 years 5 days ago
Learning to Analyze Binary Computer Code
We present a novel application of structured classification: identifying function entry points (FEPs, the starting byte of each function) in program binaries. Such identification ...
Nathan E. Rosenblum, Xiaojin Zhu, Barton P. Miller...
LCTRTS
2009
Springer
14 years 4 months ago
A compiler optimization to reduce soft errors in register files
Register file (RF) is extremely vulnerable to soft errors, and traditional redundancy based schemes to protect the RF are prohibitive not only because RF is often in the timing c...
Jongeun Lee, Aviral Shrivastava
CODES
2011
IEEE
12 years 9 months ago
Analysis and optimization of fault-tolerant task scheduling on multiprocessor embedded systems
Reliability is a major requirement for most safety-related systems. To meet this requirement, fault-tolerant techniques such as hardware replication and software re-execution are ...
Jia Huang, Jan Olaf Blech, Andreas Raabe, Christia...