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» Optimal Vector Selection for Low Power BIST
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TCAD
2010
97views more  TCAD 2010»
13 years 2 months ago
Technology Mapping and Clustering for FPGA Architectures With Dual Supply Voltages
Abstract--This paper presents a technology mapping algorithm for field-programmable gate array architectures with dual supply voltages (Vdds) for power optimization. This is done w...
Deming Chen, Jason Cong, Chen Dong, Lei He, Fei Li...
ISCAS
2008
IEEE
125views Hardware» more  ISCAS 2008»
14 years 2 months ago
Ultra-low-power UWB for sensor network applications
— Long distance, low data-rate UWB communication for sensor network applications requires a highly energy efficient transceiver combined with circuit and system-level optimizati...
Patrick P. Mercier, Denis C. Daly, Manish Bhardwaj...
JSAC
2008
106views more  JSAC 2008»
13 years 7 months ago
Enhanced multiuser random beamforming: dealing with the not so large number of users case
We consider the downlink of a wireless system with an M-antenna base station and K single-antenna users. A limited feedback-based scheduling and precoding scenario is considered th...
Marios Kountouris, David Gesbert, Thomas Sälz...
ICDE
2007
IEEE
175views Database» more  ICDE 2007»
14 years 9 months ago
Dynamic Batch Nearest Neighbor Search in Video Retrieval
To retrieve similar database videos to a query clip, each video is typically represented by a sequence of highdimensional feature vectors. Given a query video containing m feature...
Jie Shao, Zi Huang, Heng Tao Shen, Xiaofang Zhou, ...
ICCD
1999
IEEE
110views Hardware» more  ICCD 1999»
13 years 12 months ago
TriMedia CPU64 Architecture
We present a new VLIW core as a successor to the TriMedia TM1000. The processor is targeted for embedded use in media-processing devices like DTVs and set-top boxes. Intended as a...
Jos T. J. van Eijndhoven, Kees A. Vissers, Evert-J...