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» Optimal integrated code generation for VLIW architectures
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PLDI
2004
ACM
14 years 24 days ago
A generalized algorithm for graph-coloring register allocation
Graph-coloring register allocation is an elegant and extremely popular optimization for modern machines. But as currently formulated, it does not handle two characteristics common...
Michael D. Smith, Norman Ramsey, Glenn H. Holloway
WSC
2000
13 years 8 months ago
Use of discrete event simulation to validate an agent based scheduling engine
This paper discusses the use of simulation in a new context. Most often QUEST is viewed as a stand-alone simulation tool to analyze and understand shop floor behavior. It has rare...
Shubhabrata Biswas, Sara Merchawi
ICECCS
2010
IEEE
219views Hardware» more  ICECCS 2010»
13 years 7 months ago
Comparison of Six Ways to Extend the Scope of Cheddar to AADL v2 with Osate
Abstract—Cheddar is a framework dedicated to the specification of real-time schedulers, and to their analysis by simulation. It is developed in Ada. Some parts of its modular ar...
Mickaël Kerboeuf, Alain Plantec, Frank Singho...
ECBS
2006
IEEE
158views Hardware» more  ECBS 2006»
14 years 1 months ago
Automated Translation of C/C++ Models into a Synchronous Formalism
For complex systems that are reusing intellectual property components, functional and compositional design correctness are an important part of the design process. Common system l...
Hamoudi Kalla, Jean-Pierre Talpin, David Berner, L...
IEEEPACT
2006
IEEE
14 years 1 months ago
Fast, automatic, procedure-level performance tuning
This paper presents an automated performance tuning solution, which partitions a program into a number of tuning sections and finds the best combination of compiler options for e...
Zhelong Pan, Rudolf Eigenmann