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ICCAD
2007
IEEE
87views Hardware» more  ICCAD 2007»
14 years 7 months ago
Optimal polynomial-time interprocedural register allocation for high-level synthesis and ASIP design
—Register allocation, in high-level synthesis and ASIP design, is the process of determining the number of registers to include in the resulting circuit or processor. The goal is...
Philip Brisk, Ajay K. Verma, Paolo Ienne
CGO
2010
IEEE
14 years 5 months ago
Linear scan register allocation on SSA form
The linear scan algorithm for register allocation provides a good register assignment with a low compilation overhead and is thus frequently used for just-in-time compilers. Altho...
Christian Wimmer, Michael Franz
FOSSACS
2006
Springer
14 years 2 months ago
Register Allocation After Classical SSA Elimination is NP-Complete
Chaitin proved that register allocation is equivalent to graph coloring and hence NP-complete. Recently, Bouchez, Brisk, and Hack have proved independently that the interference gr...
Fernando Magno Quintão Pereira, Jens Palsbe...
IPL
2006
104views more  IPL 2006»
13 years 10 months ago
Optimal register allocation for SSA-form programs in polynomial time
This paper gives a constructive proof that the register allocation problem for a uniform register set is solvable in polynomial time for SSA-form programs. 2006 Elsevier B.V. All ...
Sebastian Hack, Gerhard Goos
IEEEPACT
2002
IEEE
14 years 3 months ago
Eliminating Exception Constraints of Java Programs for IA-64
Java exception checks are designed to ensure that any faulting instruction causing a hardware exception does not terminate the program abnormally. These checks, however, impose so...
Kazuaki Ishizaki, Tatsushi Inagaki, Hideaki Komats...