2932 search results - page 65 / 587 » Optimizing Memory System Performance for Communication in Pa... |
IPPS
1997
IEEE
14 years 6 days ago
1997
IEEE
This paper describes the design and implementation of the virtual memory-mapped communicationmodel (VMMC) on a Myrinet network of PCI-based PCs. VMMC has been designed and impleme...
HPCA
1999
IEEE
14 years 9 days ago
1999
IEEE
Impulse is a new memory system architecture that adds two important features to a traditional memory controller. First, Impulse supports application-specific optimizations through...
IPPS
2010
IEEE
13 years 6 months ago
2010
IEEE
Abstract--The growing complexity in computer system hierarchies due to the increase in the number of cores per processor, levels of cache (some of them shared) and the number of pr...
HPCA
2004
IEEE
14 years 8 months ago
2004
IEEE
Data communications between producer instructions and consumer instructions through memory incur extra delays that degrade processor performance. In this paper, we introduce a new...
SPAA
1993
ACM
14 years 2 days ago
1993
ACM
In this paper we introduce the ConSet communication model for distributed memory parallel computers. The communication needs of an application program can be satisfied by some ar...