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CONCURRENCY
2006
140views more  CONCURRENCY 2006»
13 years 8 months ago
An efficient memory operations optimization technique for vector loops on Itanium 2 processors
To keep up with a large degree of instruction level parallelism (ILP), the Itanium 2 cache systems use a complex organization scheme: load/store queues, banking and interleaving. ...
William Jalby, Christophe Lemuet, Sid Ahmed Ali To...
HPDC
1999
IEEE
14 years 10 days ago
Using Embedded Network Processors to Implement Global Memory Management in a Workstation Cluster
Advances in network technology continue to improve the communication performance of workstation and PC clusters, making high-performance workstation-clustercomputing increasingly ...
Yvonne Coady, Joon Suan Ong, Michael J. Feeley
HPDC
2008
IEEE
14 years 2 months ago
enabling cross-layer optimizations in storage systems with custom metadata
Today, several data-storage systems allow applications to create and manage custom metadata to improve data search and navigability in large-scale storage systems. Our thesis is t...
Elizeu Santos-Neto, Samer Al-Kiswany, Nazareno And...
EUROPAR
2004
Springer
14 years 1 months ago
Understanding the Behavior and Performance of Non-blocking Communications in MPI
The behavior and performance of MPI non-blocking message passing operations are sensitive to implementation specifics as they are heavily dependant on available system level buff...
Taher Saif, Manish Parashar
IPPS
1998
IEEE
14 years 8 days ago
Configuration Independent Analysis for Characterizing Shared-Memory Applications
Characterizing shared-memory applications provides insight to design efficient systems, and provides awareness to identify and correct application performance bottlenecks. Configu...
Gheith A. Abandah, Edward S. Davidson