558 search results - page 59 / 112 » Optimizing Symbolic Model Checking for Constraint-Rich Model... |
ASYNC
2005
IEEE
14 years 2 months ago
2005
IEEE
We propose a novel technique for modeling and verifying timed circuits based on the notion of generalized relative timing. Generalized relative timing constraints can express not ...
FMICS
2006
Springer
14 years 22 days ago
2006
Springer
Abstract. Bounded model checking (BMC) based on satisfiability testing (SAT) has been introduced as a complementary technique to BDDbased symbolic model checking of LTL properties ...
CEC
2008
IEEE
14 years 3 months ago
2008
IEEE
Abstract— Model Checking is a well-known and fully automatic technique for checking software properties, usually given as temporal logic formulae on the program variables. Most o...
ICCAD
2007
IEEE
14 years 28 days ago
2007
IEEE
Stepwise refinement is at the core of many approaches to synthesis and optimization of hardware and software systems. For instance, it can be used to build a synthesis approach for...
DAC
2012
ACM
11 years 11 months ago
2012
ACM
Loop pipelining is a critical transformation in behavioral synthesis. It is crucial to producing hardware designs with acceptable latency and throughput. However, it is a complex ...