1416 search results - page 7 / 284 » Optimizing Write Performance for Read Optimized Databases |
TC
1998
13 years 7 months ago
1998
—We evaluate three extensions to directory-based cache coherence protocols in shared-memory multiprocessors. These extensions are aimed at reducing the penalties associated with ...
IPPS
1999
IEEE
13 years 11 months ago
1999
IEEE
In this paper we propose a simple extension to the I/O architecture of scalable multiprocessors that optimizes page swap-outs significantly. More specifically, we propose the use o...
CASES
2008
ACM
13 years 9 months ago
2008
ACM
Java applications rely on Just-In-Time (JIT) compilers or adaptive compilers to generate and optimize binary code at runtime to boost performance. In conventional Java Virtual Mac...
IEEEPACT
2005
IEEE
14 years 1 months ago
2005
IEEE
Global address space languages like UPC exhibit high performance and portability on a broad class of shared and distributed memory parallel architectures. The most scalable applic...
PPOPP
2003
ACM
14 years 24 days ago
2003
ACM
InterWeave is a distributed middleware system that supports the sharing of strongly typed, pointer-rich data structures across a wide variety of hardware architectures, operating ...