2703 search results - page 186 / 541 » Optimizing memory transactions |
IPPS
2000
IEEE
14 years 2 months ago
2000
IEEE
As the speed gap between CPU and memory widens, memory hierarchy has become the primary factor limiting program performance. Until now, the principal focus of hardware and softwar...
CGO
2003
IEEE
14 years 1 months ago
2003
IEEE
In this paper, we present METRIC, an environment for determining memory inefficiencies by examining data traces. METRIC is designed to alter the performance behavior of applicatio...
CONNECTION
2004
13 years 10 months ago
2004
In autonomous agent systems, internal memory can be an important element to overcome the limitations of purely reactive agent behaviour. This paper presents an analysis of memory r...
PVLDB
2008
13 years 9 months ago
2008
Sorting hierarchical data in external memory is necessary for a wide variety of applications including archiving scientific data and dealing with large XML datasets. The topic of ...
DAC
2000
ACM
14 years 11 months ago
2000
ACM
Memory delays represent a major bottleneck in embedded systems performance. Newer memory modules exhibiting efficient access modes (e.g., page-, burst-mode) partly alleviate this ...