867 search results - page 11 / 174 » Optimizing synthesis with metasketches |
ITC
1998
IEEE
14 years 1 months ago
1998
IEEE
This paper presents a logic synthesis tool called BETSY (BIST Environment Testable Synthesis) for synthesizing circuits that achieve complete (100%)fault coverage in a user specif...
ISMVL
2010
IEEE
14 years 1 months ago
2010
IEEE
—Using EXOR gates in logic synthesis often results in smaller circuit realizations. While in AND/OR synthesis the problem definition is clear, in AND/EXOR synthesis several clas...
GECCO
2008
Springer
13 years 10 months ago
2008
Springer
An evolutionary synthesis method to design low-sensitivity IIR filters with linear phase in the passband is presented. The method uses a chromosome coding scheme based on the grap...
ICCAD
1995
IEEE
14 years 1 months ago
1995
IEEE
Abstract—We propose the use of the logic S1S as a mathematical framework for studying the synthesis of sequential designs. We will show that this leads to simple and mathematical...
FMCAD
2008
Springer
13 years 11 months ago
2008
Springer
Performing synthesis and verification in isolation has two undesirable consequences: (1) verification runs the risk of becoming intractable, and (2) strong sequential optimization...