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» Optimizing synthesis with metasketches
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ICPR
2004
IEEE
14 years 10 months ago
BTF Image Space Utmost Compression and Modelling Method
The bidirectional texture function (BTF) describes texture appearance variations due to varying illumination and viewing conditions. This function is acquired by large number of m...
Jirí Filip, Michael Arnold, Michal Haindl
ICCAD
2006
IEEE
190views Hardware» more  ICCAD 2006»
14 years 6 months ago
Factor cuts
Enumeration of bounded size cuts is an important step in several logic synthesis algorithms such as technology mapping and re-writing. The standard algorithm does not scale beyond...
Satrajit Chatterjee, Alan Mishchenko, Robert K. Br...
FPGA
2010
ACM
209views FPGA» more  FPGA 2010»
14 years 6 months ago
FPGA power reduction by guarded evaluation
Guarded evaluation is a power reduction technique that involves identifying sub-circuits (within a larger circuit) whose inputs can be held constant (guarded) at specific times d...
Chirag Ravishankar, Jason Helge Anderson
FPGA
2007
ACM
163views FPGA» more  FPGA 2007»
14 years 3 months ago
Improved SAT-based Boolean matching using implicants for LUT-based FPGAs
Boolean matching (BM) is a widely used technique in FPGA resynthesis and architecture evaluation. In this paper we present several improvements to the recently proposed SAT-based ...
Jason Cong, Kirill Minkovich
GECCO
2007
Springer
151views Optimization» more  GECCO 2007»
14 years 3 months ago
Solving real-valued optimisation problems using cartesian genetic programming
Classical Evolutionary Programming (CEP) and Fast Evolutionary Programming (FEP) have been applied to realvalued function optimisation. Both of these techniques directly evolve th...
James Alfred Walker, Julian Francis Miller