867 search results - page 32 / 174 » Optimizing synthesis with metasketches |
ICCAD
2005
IEEE
14 years 3 months ago
2005
IEEE
— This paper presents an architecture and a wrapper synthesis approach for the design of multi-clock systems-on-chips. We build upon the initial work on multi-clock latency-insen...
ICCAD
2000
IEEE
14 years 2 months ago
2000
IEEE
— Memory is one of the most important components to be optimized in the several phases of the synthesis process. ioral synthesis, a memory is viewed as an abstract construct whic...
ICCAD
1998
IEEE
14 years 1 months ago
1998
IEEE
We present a method for optimizing and automating component and transistor sizing for CMOS operational amplifiers. We observe that a wide variety of performance measures can be fo...
DAC
2005
ACM
13 years 11 months ago
2005
ACM
This paper presents a novel synthesis algorithm that reduces the area needed for implementing multiplexers on an FPGA by an average of 18%. This is achieved by reducing the number...
ICCAD
2005
IEEE
14 years 6 months ago
2005
IEEE
Clustering (or partitioning) is a crucial step between logic synthesis and physical design in the layout of a large scale design. A design verified at the logic synthesis level m...