366 search results - page 64 / 74 » Optimizing the Evaluation of XPath Using Description Logics |
ERSA
2006
13 years 9 months ago
2006
Reconfigurable supercomputing (RSC) combines programmable logic chips with high performance microprocessors, all communicating over a high bandwidth, low latency interconnection n...
GECCO
2008
Springer
13 years 9 months ago
2008
Springer
The choice of an appropriate hardware representation model is key to successful evolution of digital circuits. One of the most popular models is cartesian genetic programming, whi...
HIPEAC
2009
Springer
14 years 1 months ago
2009
Springer
Abstract. In transactional memory, aborted transactions reduce performance, and waste computing resources. Ideally, concurrent execution of transactions should be optimally ordered...
SIGMOD
2005
ACM
14 years 8 months ago
2005
ACM
We present a method to evaluate path queries based on the novel concept of partial path instances. Our method (1) maximizes performance by means of sequential scans or asynchronou...
SIGMOD
2009
ACM
14 years 8 months ago
2009
ACM
Composite (or Complex) event processing (CEP) systems search sequences of incoming events for occurrences of userspecified event patterns. Recently, they have gained more attentio...