1990 search results - page 51 / 398 » Optimizing the Instruction Cache Performance of the Operatin... |
GLVLSI
2007
IEEE
13 years 11 months ago
2007
IEEE
Application-specific instruction set processor (ASIP) has become an important design choice for embedded systems. It can achieve both high flexibility offered by the base processo...
CCGRID
2004
IEEE
13 years 11 months ago
2004
IEEE
The advent of networking technologies and high performance transport protocols facilitates the service of storage over networks. However, they pose challenges in integration and i...
IEEEPACT
2005
IEEE
14 years 1 months ago
2005
IEEE
This paper presents a new technique for efficient usage of small trace caches. A trace cache can significantly increase the performance of wide out-oforder processors, but to be e...
SBACPAD
2003
IEEE
14 years 28 days ago
2003
IEEE
In this paper, we reevaluate the use of adaptive compressed caching to improve system performance through the reduction of accesses to the backing stores. We propose a new adaptab...
CGO
2006
IEEE
14 years 1 months ago
2006
IEEE
Software code caches are increasingly being used to amortize the runtime overhead of dynamic optimizers, simulators, emulators, dynamic translators, dynamic compilers, and other t...