1990 search results - page 55 / 398 » Optimizing the Instruction Cache Performance of the Operatin... |
ICCD
2004
IEEE
14 years 4 months ago
2004
IEEE
Existing schemes for cache energy optimization incorporate a limited degree of dynamic associativity: either direct mapped or full available associativity (say 4-way). In this pap...
ICASSP
2011
IEEE
12 years 11 months ago
2011
IEEE
While the research into MIMO communications algorithms have reached levels of development that show important wireless systems performance improvements, the development of DSP sys...
CODES
2008
IEEE
14 years 2 months ago
2008
IEEE
Application-specific system-on-chip platforms create the opportunity to customize the cache configuration for optimal performance with minimal chip estate. Simulation, in partic...
PLDI
2005
ACM
14 years 1 months ago
2005
ACM
Code placement techniques have traditionally improved instruction fetch bandwidth by increasing instruction locality and decreasing the number of taken branches. However, traditio...
IPPS
2000
IEEE
14 years 2 days ago
2000
IEEE
Parallel programs that modify shared data in a cachecoherent multiprocessor with a write-invalidate coherence protocol create ownership overhead in the form of ownership acquisiti...