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» Order Scheduling Models: Hardness and Algorithms
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FMSD
2002
107views more  FMSD 2002»
13 years 7 months ago
Verification of Out-Of-Order Processor Designs Using Model Checking and a Light-Weight Completion Function
We present a new technique for verification of complex hardware devices that allows both generality andahighdegreeofautomation.Thetechniqueisbasedonournewwayofconstructinga"li...
Sergey Berezin, Edmund M. Clarke, Armin Biere, Yun...
ECRTS
2003
IEEE
14 years 28 days ago
Resource Sharing in an Enhanced Rate-Based Execution Model
A theory of resource sharing in a mixed system with hard real-time and non-real-time processing requirements is presented. The real-time processing is modeled as rate-based execut...
Xin Liu, Steve Goddard
ADAEUROPE
2005
Springer
14 years 1 months ago
Integrating Application-Defined Scheduling with the New Dispatching Policies for Ada Tasks
: In previous papers we had presented an application program interface (API) that enabled applications to use application-defined scheduling algorithms for Ada tasks in a way compa...
Mario Aldea Rivas, Javier Miranda, Michael Gonz&aa...
FMCAD
1998
Springer
13 years 12 months ago
Combining Symbolic Model Checking with Uninterpreted Functions for Out-of-Order Processor Verification
We present a new approach to the verification of hardware systems with data dependencies using temporal logic symbolic model checking. As a benchmark we take Tomasulo's algori...
Sergey Berezin, Armin Biere, Edmund M. Clarke, Yun...
ENTCS
2007
144views more  ENTCS 2007»
13 years 7 months ago
Partial Order Reduction for Rewriting Semantics of Programming Languages
Software model checkers are typically language-specific, require substantial development efforts, and are hard to reuse for other languages. Adding partial order reduction (POR)...
Azadeh Farzan, José Meseguer