A parallel transputer-based emulator has been developed to evaluate the DDM--ahighlyparallel virtual shared memory architecture. The emulator provides performance results of a har...
Henk L. Muller, Paul W. A. Stallard, David H. D. W...
Ahead-of-Time and Just-in-Time compilation are common ways to improve runtime performances of restrained systems like Java Card by turning critical Java methods into native code. H...
This paper is concerned with the application of formal optimisation methods to the design of mixed-granularity FPGAs. In particular, we investigate the appropriate mix and floorpl...
Alastair M. Smith, George A. Constantinides, Peter...
The IA-64, Intel's 64-bit instruction set architecture, exhibits a number of interesting architectural features. Here we consider those features as they relate to supporting ...
Richard L. Hudson, J. Eliot B. Moss, Sreenivas Sub...
We present the rational construction of a generic domain for structural information analysis of real CLP languages called Pattern(D ), where the parameter D is an abstract domain s...
Roberto Bagnara, Patricia M. Hill, Enea Zaffanella