Sciweavers

397 search results - page 5 / 80
» Overview of LDPC Codes
Sort
View
ISCAS
2008
IEEE
109views Hardware» more  ISCAS 2008»
14 years 1 months ago
A dual-core programmable decoder for LDPC convolutional codes
Abstract— We present the concepts and realization of a highly parallelized decoder architecture for LDPC convolutional codes and tailbiting LDPC convolutional codes. This archite...
Marcos B. S. Tavares, Emil Matús, Steffen K...
ASPDAC
2006
ACM
133views Hardware» more  ASPDAC 2006»
14 years 1 months ago
High-throughput decoder for low-density parity-check code
— We have designed and implemented the LDPC decoder chip with memory-reduction method to achieve high-throughput and practical chip size. The decoder decodes (3,6)-2304bit regula...
Tatsuyuki Ishikawa, Kazunori Shimizu, Takeshi Iken...
VTC
2007
IEEE
109views Communications» more  VTC 2007»
14 years 1 months ago
A Reliability-Aware LDPC Code Decoding Algorithm
— With the continuing downscaling of microelectronic technology, chip reliability becomes a great threat to the design of future complex microelectronic systems. Hence increasing...
Matthias Alles, Torben Brack, Norbert Wehn
VTC
2006
IEEE
103views Communications» more  VTC 2006»
14 years 1 months ago
Generalized Low-Density Parity-Check Coding Aided Multilevel Codes
– Classic Low-Density Parity-Check (LDPC) codes have recently been used as component codes in Multilevel Coding (MLC) due to their impressive BER performance as well as owing to ...
Ronald Y. S. Tee, Fang-Chun Kuo, Lajos Hanzo
WCNC
2008
IEEE
14 years 1 months ago
Decoding on Graphs: LDPC-Coded MISO Systems and Belief Propagation
— This paper proposes a new approach for decoding LDPC codes over MISO channels. Since in an nT × 1 MISO system with a modulation of alphabet size 2M, nT transmitted symbols are...
Amir H. Djahanshahi, Paul H. Siegel, Laurence B. M...