138 search results - page 19 / 28 » PADded Cache: A New Fault-Tolerance Technique for Cache Memo... |
IPPS
2010
IEEE
13 years 5 months ago
2010
IEEE
Abstract--The growing complexity in computer system hierarchies due to the increase in the number of cores per processor, levels of cache (some of them shared) and the number of pr...
SIGMETRICS
2005
ACM
14 years 1 months ago
2005
ACM
The running time of many applications is dominated by the cost of memory operations. To optimize such applications for a given platform, it is necessary to have a detailed knowled...
HPCC
2007
Springer
14 years 1 months ago
2007
Springer
This paper presents a new algorithm for computing the singular value decomposition (SVD) on multilevel memory hierarchy architectures. This algorithm is based on one-sided JRS iter...
IPPS
2000
IEEE
14 years 1 days ago
2000
IEEE
As the speed gap between CPU and memory widens, memory hierarchy has become the primary factor limiting program performance. Until now, the principal focus of hardware and softwar...
LCPC
2005
Springer
14 years 1 months ago
2005
Springer
Programming network processors remains a challenging task since their birth until recently when high-level programming environments for them are emerging. By employing domain speci...