138 search results - page 26 / 28 » PADded Cache: A New Fault-Tolerance Technique for Cache Memo... |
IPPS
2007
IEEE
14 years 1 months ago
2007
IEEE
The trend of increasing speed and complexity in the single-core processor as stated in the Moore’s law is facing practical challenges. As a result, the multi-core processor arch...
TVLSI
2008
13 years 7 months ago
2008
Data stability of SRAM cells has become an important issue with the scaling of CMOS technology. Memory banks are also important sources of leakage since the majority of transistors...
CGO
2006
IEEE
13 years 11 months ago
2006
IEEE
Modern computer systems are called on to deal with billions of events every second, whether they are instructions executed, memory locations accessed, or packets forwarded. This p...
CASES
2006
ACM
14 years 1 months ago
2006
ACM
Dictionary code compression is a technique where long instructions in the memory are replaced with shorter code words used as index in a table to look up the original instructions...
PODC
1998
ACM
13 years 12 months ago
1998
ACM
: We present a new model for handling messages and state in a distributed application that we call Messages in Local Transactions (MLT). Under this model, messages and data are not...