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» Packet Delay-Aware Scheduling in Input Queued Switches
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IPPS
2008
IEEE
14 years 1 months ago
Providing flow based performance guarantees for buffered crossbar switches
Buffered crossbar switches are a special type of combined input-output queued switches with each crosspoint of the crossbar having small on-chip buffers. The introduction of cross...
Deng Pan, Yuanyuan Yang
GLOBECOM
2009
IEEE
13 years 10 months ago
Efficient Multicast Support in Buffered Crossbars using Networks on Chip
The Internet growth coupled with the variety of its services is creating an increasing need for multicast traffic support by backbone routers and packet switches. Recently, buffere...
Iria Varela Senin, Lotfi Mhamdi, Kees Goossens
ICC
2007
IEEE
106views Communications» more  ICC 2007»
14 years 1 months ago
A Novel Feedback Mechanism for Load Balanced Two-Stage Switches
— A novel feedback mechanism is proposed in this paper to enhance the performance of load-balanced two-stage switches. The key idea is to properly select and coordinate the two s...
Kwan L. Yeung, Bing Hu, N. H. Liu
SPAA
2004
ACM
14 years 4 days ago
Packet-mode policies for input-queued switches
This paper considers the problem of packet-mode scheduling of input queuedswitches. Packets have variable lengths, and are divided into cells of unit length. Each packet arrives t...
Dan Guez, Alexander Kesselman, Adi Rosén
INFOCOM
2003
IEEE
14 years 4 hour ago
Using Switched Delay Lines for Exact Emulation of FIFO Multiplexers with Variable Length Bursts
—It has been studied extensively in the literature how one achieves exact emulation of First In First Out (FIFO) multiplexers for fixed size cells (or packets) using optical cro...
Cheng-Shang Chang, Duan-Shin Lee, Chao-Kai Tu