108 search results - page 21 / 22 » Parallel Coarse Grain Computing of Boltzmann Machines |
IEEEPACT
2007
IEEE
14 years 2 months ago
2007
IEEE
As multi-core architectures flourish in the marketplace, multi-application workload scenarios (such as server consolidation) are growing rapidly. When running multiple application...
ASPDAC
2006
ACM
14 years 1 months ago
2006
ACM
Abstract - this paper proposes the use of a high-level architecture exploration method for different MPEG4 video encoders using different customization parameters. The targeted arc...
CORR
2010
Springer
13 years 7 months ago
2010
Springer
Space is a spatial programming language designed to exploit the massive parallelism available in a formal model of computation called the Synchronic A-Ram, and physically related ...
ICCAD
2006
IEEE
14 years 4 months ago
2006
IEEE
A dynamically reconfigurable processor (DRP) is designed to achieve high area efficiency by switching reconfigurable data paths dynamically. Our DRP architecture has a stand alone...
ICPP
2003
IEEE
14 years 1 months ago
2003
IEEE
Process/thread migration and checkpointing schemes support load balancing, load sharing and fault tolerance to improve application performance and system resource usage on worksta...