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ISCA
1997
IEEE
96views Hardware» more  ISCA 1997»
14 years 27 days ago
DataScalar Architectures
DataScalar architectures improve memory system performance by running computation redundantly across multiple processors, which are each tightly coupled with an associated memory....
Doug Burger, Stefanos Kaxiras, James R. Goodman
CORR
2008
Springer
185views Education» more  CORR 2008»
13 years 8 months ago
Realizing Fast, Scalable and Reliable Scientific Computations in Grid Environments
The practical realization of managing and executing large scale scientific computations efficiently and reliably is quite challenging. Scientific computations often invo...
Yong Zhao, Ioan Raicu, Ian T. Foster, Mihael Hateg...
CPHYSICS
2006
127views more  CPHYSICS 2006»
13 years 8 months ago
GenAnneal: Genetically modified Simulated Annealing
A modification of the standard Simulated Annealing (SA) algorithm is presented for finding the global minimum of a continuous multidimensional, multimodal function. We report resu...
Ioannis G. Tsoulos, Isaac E. Lagaris
ICS
2005
Tsinghua U.
14 years 2 months ago
Improved automatic testcase synthesis for performance model validation
Performance simulation tools must be validated during the design process as functional models and early hardware are developed, so that designers can be sure of the performance of...
Robert H. Bell Jr., Lizy Kurian John
HPDC
2007
IEEE
14 years 3 months ago
Feedback-directed thread scheduling with memory considerations
This paper describes a novel approach to generate an optimized schedule to run threads on distributed shared memory (DSM) systems. The approach relies upon a binary instrumentatio...
Fengguang Song, Shirley Moore, Jack Dongarra