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» Parallel FFT Algorithms on Network-on-Chips
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IPPS
2010
IEEE
13 years 5 months ago
Oblivious algorithms for multicores and network of processors
We address the design of algorithms for multicores that are oblivious to machine parameters. We propose HM, a multicore model consisting of a parallel shared-memory machine with hi...
Rezaul Alam Chowdhury, Francesco Silvestri, Brando...
CCGRID
2010
IEEE
13 years 5 months ago
Low-Cost Tuning of Two-Step Algorithms for Scheduling Mixed-Parallel Applications onto Homogeneous Clusters
Due to the strong increase of processing units available to the end user, expressing parallelism of an algorithm is a major challenge for many researchers. Parallel applications ar...
Sascha Hunold
IPPS
2007
IEEE
14 years 2 months ago
Experience of Optimizing FFT on Intel Architectures
Automatic library generators, such as ATLAS [11], Spiral [8] and FFTW [2], are promising technologies to generate efficient code for different computer architectures. The library...
Daniel Orozco, Liping Xue, Murat Bolat, Xiaoming L...
IPPS
2002
IEEE
14 years 23 days ago
A SIMD Vectorizing Compiler for Digital Signal Processing Algorithms
Short vector SIMD instructions on recent microprocessors, such as SSE on Pentium III and 4, speed up code but are a major challenge to software developers. We present a compiler t...
Franz Franchetti, Markus Püschel
IPPS
1998
IEEE
14 years 2 days ago
Mechanically Verifying the Correctness of the Fast Fourier Transform in ACL2
In [10], Misra introduced the powerlist data structure, which is well suited to express recursive, data-parallel algorithms. In particular, Misra showed how powerlists could be use...
Ruben Gamboa