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IPPS
2007
IEEE
15 years 8 months ago
Exploring a Multithreaded Methodology to Implement a Network Communication Protocol on the Cyclops-64 Multithreaded Architecture
The IBM Cyclops-64 (C64) chip employs a multithreaded architecture that integrates a large number of hardware thread units on a single chip. A cellular supercomputer is being deve...
Ge Gan, Ziang Hu, Juan del Cuvillo, Guang R. Gao
ISCAS
2005
IEEE
133views Hardware» more  ISCAS 2005»
15 years 8 months ago
Multiobjective VLSI cell placement using distributed simulated evolution algorithm
— Simulated Evolution (SimE) is a sound stochastic approximation algorithm based on the principles of adaptation. If properly engineered it is possible for SimE to reach nearopti...
Sadiq M. Sait, Ali Mustafa Zaidi, Mustafa I. Ali
118
Voted
PARELEC
2002
IEEE
15 years 7 months ago
Dynamic Process Partitioning and Migration for Irregular Applications
Many practical applications generate irregular, nonbalanced divide-and-conquer trees which have different depths, possibly also different numbers of successors at different levels...
Pawel Czarnul
100
Voted
ICS
2010
Tsinghua U.
15 years 7 months ago
Cache oblivious parallelograms in iterative stencil computations
We present a new cache oblivious scheme for iterative stencil computations that performs beyond system bandwidth limitations as though gigabytes of data could reside in an enormou...
Robert Strzodka, Mohammed Shaheen, Dawid Pajak, Ha...
146
Voted
CPE
1998
Springer
123views Hardware» more  CPE 1998»
15 years 6 months ago
A Modular and Scalable Simulation Tool for Large Wireless Networks
This paper describes a modular and scalable simulation environment, called GloMoSim, to evaluate end-to-end performance of integrated wired and wireless networks. GloMoSim has been...
Rajive Bagrodia, Mario Gerla