Sciweavers

1583 search results - page 252 / 317
» Parallel High-Order Integrators
Sort
View
SC
2004
ACM
14 years 1 months ago
Language and Compiler Support for Adaptive Applications
There exist many application classes for which the users have significant flexibility in the quality of output they desire. At the same time, there are other constraints, such a...
Wei Du, Gagan Agrawal
AMAI
2004
Springer
14 years 1 months ago
Using Automatic Case Splits and Efficient CNF Translation to Guide a SAT-solver when Formally Verifying Out-Of-Order Processors
The paper integrates automatically generated case-splitting expressions, and an efficient translation to CNF, in order to formally verify an out-of-order superscalar processor havi...
Miroslav N. Velev
ESTIMEDIA
2004
Springer
14 years 1 months ago
A hardware accelerator IP for EBCOT Tier-1 coding in JPEG2000 Standard
We proposed a hardware accelerator IP for the Tier-1 portion of Embedded Block Coding with Optimal Truncation (EBCOT) used in the JPEG2000 next generation image compression standa...
Tien-Wei Hsieh, Youn-Long Lin
EUROPAR
2004
Springer
14 years 1 months ago
Databases, Workflows and the Grid in a Service Oriented Environment
As the Grid moves towards adopting a service-oriented architecture built on Web services, coupling between processes will rely on secure, reliable, and transacted messages and be s...
Zhuoan Jiao, Jasmin L. Wason, Wenbin Song, Fenglia...
FPGA
2004
ACM
121views FPGA» more  FPGA 2004»
14 years 1 months ago
Highly pipelined asynchronous FPGAs
We present the design of a high-performance, highly pipelined asynchronous FPGA. We describe a very fine-grain pipelined logic block and routing interconnect architecture, and sh...
John Teifel, Rajit Manohar