Sciweavers

1138 search results - page 164 / 228
» Parallel Implementation of Constraint Solving
Sort
View
IPPS
2009
IEEE
14 years 3 months ago
Throughput-fairness tradeoff in Best Effort flow control for on-chip architectures
We consider two flow control schemes for Best Effort traffic in on-chip architectures, which can be deemed as the solutions to the boundary extremes of a class of utility maximi...
Fahimeh Jafari, Mohammad Sadegh Talebi, Mohammad H...
IPPS
2009
IEEE
14 years 3 months ago
Enabling high-performance memory migration for multithreaded applications on LINUX
As the number of cores per machine increases, memory architectures are being redesigned to avoid bus contention and sustain higher throughput needs. The emergence of Non-Uniform M...
Brice Goglin, Nathalie Furmento
IPPS
2007
IEEE
14 years 3 months ago
Porting the GROMACS Molecular Dynamics Code to the Cell Processor
The Cell processor offers substantial computational power which can be effectively utilized only if application design and implementation are tuned to the Cell architecture. In th...
Stephen Olivier, Jan Prins, Jeff Derby, Ken V. Vu
COORDINATION
2007
Springer
14 years 3 months ago
Component Connectors with QoS Guarantees
Connectors have emerged as a powerful concept for composition and coordination of concurrent activities encapsulated as components and services. Compositional coordination models a...
Farhad Arbab, Tom Chothia, Sun Meng, Young-Joo Moo...
IPPS
2006
IEEE
14 years 2 months ago
Ad-hoc distributed spatial joins on mobile devices
PDAs, cellular phones and other mobile devices are now capable of supporting complex data manipulation operations. Here, we focus on ad-hoc spatial joins of datasets residing in m...
Panos Kalnis, Nikos Mamoulis, Spiridon Bakiras, Xi...