309 search results - page 55 / 62 » Parallel Memory Architecture for Arbitrary Stride Accesses |
PDP
2009
IEEE
14 years 2 months ago
2009
IEEE
PsycoTrace is a set of tools to protect a process P from attacks that alter P self as specified by its source code. P self is specified in terms of legal traces of system calls ...
ICDCS
2008
IEEE
14 years 1 months ago
2008
IEEE
We introduce a Write-Once Read-Many (WORM) storage system providing strong assurances of data retention and compliant migration, by leveraging trusted secure hardware in close dat...
ICPP
2008
IEEE
14 years 1 months ago
2008
IEEE
This paper presents a novel stateless, virtualized communication engine for sub-microsecond latency. Using a Field-Programmable-Gate-Array (FPGA) based prototype we show a latency...
ICDCS
2007
IEEE
14 years 1 months ago
2007
IEEE
Record and Replay (RR) is a software based state replication solution designed to support recording and subsequent replay of the execution of unmodified applications running on mu...
HIPC
2007
Springer
14 years 1 months ago
2007
Springer
: The Cell is a heterogeneous multi-core processor, which has eight co-processors, called SPEs. The SPEs can access a common shared main memory through DMA, and each SPE can direct...