361 search results - page 49 / 73 » Parallel Model Checking for Temporal Epistemic Logic |
FMSD
2010
13 years 6 months ago
2010
In this paper, we consider verifying properties of mixed-signal circuits, i.e., circuits for which there is an interaction between analog (continuous) and digital (discrete) values...
MEMOCODE
2003
IEEE
14 years 26 days ago
2003
IEEE
In the design process of SoC (System on Chip), validation is one of the most critical and costly activity. The main problem for industrial companies like STMicroelectronics, stand...
CONCUR
2010
Springer
13 years 8 months ago
2010
Springer
Higher dimensional automata (HDA) are a model of concurrency that can express most of the traditional partial order models like Mazurkiewicz traces, pomsets, event structures, or P...
COORDINATION
2009
Springer
14 years 8 months ago
2009
Springer
Process algebras are a set of mathematically rigourous languages with well defined semantics that permit modelling behaviour of concurrent and communicating systems. Verification o...
SIGSOFT
2003
ACM
14 years 26 days ago
2003
ACM
Model checking and other finite-state analysis techniques have been very successful when used with hardware systems and less successful with software systems. It is especially di...