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IPPS
2000
IEEE
14 years 29 days ago
Controlling Distributed Shared Memory Consistency from High Level Programming Languages
One of the keys for the success of parallel processing is the availability of high-level programming languages for on-the-shelf parallel architectures. Using explicit message passi...
Yvon Jégou
VLSISP
2008
132views more  VLSISP 2008»
13 years 8 months ago
Serial and Parallel FPGA-based Variable Block Size Motion Estimation Processors
H.264/AVC is the latest video coding standard adopting variable block size motion estimation (VBS-ME), quarter-pixel accuracy, motion vector prediction and multi-reference frames f...
Brian M. H. Li, Philip Heng Wai Leong
ISHPC
1999
Springer
14 years 25 days ago
Instruction-Level Microprocessor Modeling of Scientific Applications
Superscalar microprocessor efficiency is generally not as high as anticipated. In fact, sustained utilization below thirty percent of peak is not uncommon, even for fully optimized...
Kirk W. Cameron, Yong Luo, James Scharzmeier
EUROPAR
2003
Springer
14 years 1 months ago
Exploiting On-Chip Data Transfers for Improving Performance of Chip-Scale Multiprocessors
As compared to a complex single processor based system, on-chip multiprocessors are less complex, more power efficient, and easier to test and validate. In this work, we focus on a...
Guangyu Chen, Mahmut T. Kandemir, Alok N. Choudhar...
IPPS
2007
IEEE
14 years 2 months ago
DejaVu: Transparent User-Level Checkpointing, Migration, and Recovery for Distributed Systems
In this paper, we present a new fault tolerance system called DejaVu for transparent and automatic checkpointing, migration, and recovery of parallel and distributed applications....
Joseph F. Ruscio, Michael A. Heffner, Srinidhi Var...