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» Parallel Processing Architectures for Reconfigurable Systems
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ICDCS
1997
IEEE
14 years 1 months ago
Group Communication Support for Distributed Multimedia and CSCW Systems
The Collaborative Computing Transport Layer (CCTL) is a communication substrate consisting of a suite of multiparty protocols, providing varying service qualities among process gr...
Injong Rhee, Shun Yan Cheung, Phillip W. Hutto, Va...
IPPS
2010
IEEE
13 years 7 months ago
Performance modeling of heterogeneous systems
Predicting how well applications may run on modern systems is becoming increasingly challenging. It is no longer sufficient to look at number of floating point operations and commu...
Jan Christian Meyer, Anne C. Elster
SIGGRAPH
2010
ACM
14 years 1 months ago
Popup: automatic paper architectures from 3D models
Paper architectures are 3D paper buildings created by folding and cutting. The creation process of paper architecture is often laborintensive and highly skill-demanding, even with...
Xian-Ying Li, Chao-Hui Shen, Shi-Sheng Huang, Tao ...
ASAP
2004
IEEE
171views Hardware» more  ASAP 2004»
14 years 23 days ago
CHARMED: A Multi-Objective Co-Synthesis Framework for Multi-Mode Embedded Systems
In this paper, we present a modular co-synthesis framework called CHARMED that solves the problem of hardware-software co-synthesis of periodic, multi-mode, distributed, embedded ...
Vida Kianzad, Shuvra S. Bhattacharyya
HPCA
1998
IEEE
14 years 1 months ago
Performance Study of a Concurrent Multithreaded Processor
The performance of a concurrent multithreaded architectural model, called superthreading 15 , is studied in this paper. It tries to integrate optimizing compilation techniques and...
Jenn-Yuan Tsai, Zhenzhen Jiang, Eric Ness, Pen-Chu...