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» Parallel Processing Architectures for Reconfigurable Systems
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INFOCOM
2002
IEEE
14 years 17 days ago
Ultrafast Photonic Label Switch for Asynchronous Packets of Variable Length
- This paper describes new optical switching architectures supporting asynchronous variable-length packets. Output line contention is resolved by optical delay line buffers. By int...
Masayuki Murata, Ken-ichi Kitayama
CORR
2007
Springer
154views Education» more  CORR 2007»
13 years 7 months ago
Application of a design space exploration tool to enhance interleaver generation
This paper presents a methodology to efficiently explore the design space of communication adapters. In most digital signal processing (DSP) applications, the overall performance ...
Cyrille Chavet, Philippe Coussy, Pascal Urard, Eri...
SIGARCH
2008
144views more  SIGARCH 2008»
13 years 7 months ago
A stream chip-multiprocessor for bioinformatics
- Bioinformatics applications such as gene and protein sequence matching algorithms are characterized by the need to process large amounts of data. While uni-processor performance ...
Ravi Kiran Karanam, Arun Ravindran, Arindam Mukher...
MM
2005
ACM
371views Multimedia» more  MM 2005»
14 years 1 months ago
Data grid for large-scale medical image archive and analysis
Storage and retrieval technology for large-scale medical image systems has matured significantly during the past ten years but many implementations still lack cost-effective backu...
H. K. Huang, Aifeng Zhang, Brent J. Liu, Zheng Zho...
DEBS
2007
ACM
13 years 9 months ago
Identification of suspicious, unknown event patterns in an event cloud
This paper describes an approach to detect unknown event patterns. In this context, an event is not only something that happens, but also something that can be analysed. This task...
Alexander Widder, Rainer von Ammon, Philippe Schae...