Sciweavers

833 search results - page 34 / 167
» Parallel Processing Architectures for Reconfigurable Systems
Sort
View
FCCM
2005
IEEE
115views VLSI» more  FCCM 2005»
14 years 1 months ago
FIFO Communication Models in Operating Systems for Reconfigurable Computing
Increasing demands upon embedded systems for higher level services like networking, user interfaces and file system management, are driving growth in fully-featured operating syst...
John A. Williams, Neil W. Bergmann, X. Xie
FTDCS
2004
IEEE
13 years 11 months ago
Self-Aware Distributed Embedded Systems
Distributed embedded sensor networks are now being successfully deployed in environmental monitoring of natural phenomena as well as for applications in commerce and physical secu...
Richard Pon, Maxim A. Batalin, Mohammad H. Rahimi,...
IPPS
2003
IEEE
14 years 29 days ago
Loop Dissevering: A Technique for Temporally Partitioning Loops in Dynamically Reconfigurable Computing Platforms
This paper presents a technique, called loop dissevering, to temporally partitioning any type of loop presented in programming languages. The technique can be used in the presence...
João M. P. Cardoso
ISMB
1994
13 years 9 months ago
High Speed Pattern Matching in Genetic Data Base with Reconfigurable Hardware
Homologydetection in large data bases is probably the most time consuming operation in molecular genetic computing systems. Moreover, the progresses made all around the world conc...
Eric Lemoine, Joël Quinqueton, Jean Sallantin
ISPAN
1997
IEEE
13 years 12 months ago
CASS: an efficient task management system for distributed memory architectures
The thesis of this research is that the task of exposing the parallelism in a given application should be left to the algorithm designer, who has intimate knowledge of the applica...
Jing-Chiou Liou, Michael A. Palis