153 search results - page 20 / 31 » Parallel Programmable Ethernet Controllers: Performance and ... |
IPPS
2006
IEEE
14 years 1 months ago
2006
IEEE
Digital Down Conversion (DDC) is an algorithm, used to lower the amount of samples per second by selecting a limited frequency band out of a stream of samples. A possible DDC algo...
LCPC
2007
Springer
14 years 1 months ago
2007
Springer
Abstract. Partitioned Global Address Space (PGAS) languages offer an attractive, high-productivity programming model for programming large-scale parallel machines. PGAS languages, ...
TII
2010
13 years 2 months ago
2010
Software intellectual property (SWIP) is a critical component of increasingly complex field programmable gate arrays (FPGA)-based system-on-chip (SOC) designs. As a result, develop...
CSFW
2011
IEEE
12 years 7 months ago
2011
IEEE
—This paper introduces YARRA, a conservative extension to C to protect applications from non-control data attacks. YARRA programmers specify their data integrity requirements by ...
IPPS
2009
IEEE
14 years 2 months ago
2009
IEEE
String searching is at the core of many security and network applications like search engines, intrusion detection systems, virus scanners and spam filters. The growing size of o...