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ERSA
2008
145views Hardware» more  ERSA 2008»
13 years 9 months ago
Multicore Devices: A New Generation of Reconfigurable Architectures
For two decades, reconfigurable computing systems have provided an attractive alternative to fixed hardware solutions. Reconfigurable computing systems have demonstrated the low c...
Steven A. Guccione
IPPS
1999
IEEE
13 years 11 months ago
Optimizing Irregular HPF Applications using Halos
This paper presents language features for High Performance Fortran HPF to specify non-local access patterns of distributed arrays, called halos, and to control the communication as...
Siegfried Benkner
OOPSLA
2009
Springer
14 years 2 months ago
A concurrent dynamic analysis framework for multicore hardware
Software has spent the bounty of Moore’s law by solving harder problems and exploiting abstractions, such as highlevel languages, virtual machine technology, binary rewritdynami...
Jungwoo Ha, Matthew Arnold, Stephen M. Blackburn, ...
ANCS
2007
ACM
13 years 11 months ago
Ruler: high-speed packet matching and rewriting on NPUs
Programming specialized network processors (NPU) is inherently difficult. Unlike mainstream processors where architectural features such as out-of-order execution and caches hide ...
Tomas Hruby, Kees van Reeuwijk, Herbert Bos
ICIP
2010
IEEE
13 years 5 months ago
A hybrid fusion method of fingerprint identification for high security applications
Though fingerprint identification is widely used now, its imperfect performance for some high security applications, such as ATM, the access control of nuclear power stations and ...
Yilong Yin, Yanbin Ning, Zhiguo Yang