1075 search results - page 164 / 215 » Parallel Programming with Transactional Memory |
IPPS
2010
IEEE
13 years 8 months ago
2010
IEEE
Abstract--The now commonplace multi-core chips have introduced, by design, a deep hierarchy of memory and cache banks within parallel computers as a tradeoff between the user frien...
ICS
1999
Tsinghua U.
14 years 3 months ago
1999
Tsinghua U.
Researchers have recently proposed coupling small- to mediumscale multiprocessors to build large-scale shared memory machines, known as multigrain shared memory systems. Multigrai...
IPPS
2009
IEEE
14 years 5 months ago
2009
IEEE
The increasing demand for computational cycles is being met by the use of multi-core processors. Having large number of cores per node necessitates multi-core aware designs to ext...
IPPS
2006
IEEE
14 years 4 months ago
2006
IEEE
As bioinformatics is an emerging application of high performance computing, this paper first evaluates the memory performance of several representative bioinformatics application...
IPPS
2006
IEEE
14 years 4 months ago
2006
IEEE
Step caches are caches in which data entered to an cache array is kept valid only until the end of ongoing step of execution. Together with an advanced pipelined multithreaded arc...