1075 search results - page 170 / 215 » Parallel Programming with Transactional Memory |
127
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VEE
2005
ACM
15 years 7 months ago
2005
ACM
Modern transactional response-time sensitive applications have run into practical limits on the size of garbage collected heaps. The heap can only grow until GC pauses exceed the ...
156
Voted
IWOMP
2007
Springer
15 years 8 months ago
2007
Springer
The Cell processor is a heterogeneous multi-core processor with one Power Processing Engine (PPE) core and eight Synergistic Processing Engine (SPE) cores. Each SPE has a directly...
146
Voted
RSP
2006
IEEE
15 years 8 months ago
2006
IEEE
Embedded real-time multimedia applications usually imply data parallel processing. SIMD processors embedded in SOCs are cost-effective to exploit the underlying parallelism. Howev...
114
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ICPP
2005
IEEE
15 years 7 months ago
2005
IEEE
We describe a generic programming model to design collective communications on SMP clusters. The programming model utilizes shared memory for collective communications and overlap...
134
Voted
ICPP
1999
IEEE
15 years 6 months ago
1999
IEEE
There has been much work recently on improving the locality performance of loop nests in scientific programs through the use of loop as well as data layout optimizations. However,...