Sciweavers

287 search results - page 13 / 58
» Parallel Skyline Computation on Multicore Architectures
Sort
View
ICPP
2009
IEEE
14 years 2 months ago
Fine-grain Parallelism Using Multi-core, Cell/BE, and GPU Systems: Accelerating the Phylogenetic Likelihood Function
We are currently faced with the situation where applications have increasing computational demands and there is a wide selection of parallel processor systems. In this paper we fo...
Frederico Pratas, Pedro Trancoso, Alexandros Stama...
CSO
2009
IEEE
13 years 11 months ago
Parallel Video Surveillance on the Multi-core Cell Broadband Engine
The IBM Cell Broadband Engine (BE) is a multicore processor with a PowerPC host processor (PPE) and 8 synergic processor engines (SPEs). The Cell BE architecture is designed to im...
Tamer F. Rabie, Hashir Karim Kidwai, Fadi N. Sibai
HIPC
2009
Springer
13 years 5 months ago
Fast checkpointing by Write Aggregation with Dynamic Buffer and Interleaving on multicore architecture
Large scale compute clusters continue to grow to ever-increasing proportions. However, as clusters and applications continue to grow, the Mean Time Between Failures (MTBF) has redu...
Xiangyong Ouyang, Karthik Gopalakrishnan, Tejus Ga...
CPHYSICS
2010
135views more  CPHYSICS 2010»
13 years 7 months ago
An events based algorithm for distributing concurrent tasks on multi-core architectures
In this paper, a programming model is presented which enables scalable parallel performance on multi-core shared memory architectures. The model has been developed for application...
David W. Holmes, John R. Williams, Peter Tilke
IPPS
2010
IEEE
13 years 5 months ago
Structuring the execution of OpenMP applications for multicore architectures
Abstract--The now commonplace multi-core chips have introduced, by design, a deep hierarchy of memory and cache banks within parallel computers as a tradeoff between the user frien...
François Broquedis, Olivier Aumage, Brice G...