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IPPS
1998
IEEE
13 years 11 months ago
HOSMII: A Virtual Hardware Integrated with DRAM
WASMII, a virtual hardware system that executes data ow algorithms, is based on an MPLD, an extended FPGA with multiple sets of con guration SRAM. Although we have developed an emu...
Yuichiro Shibata, Hidenori Miyazaki, Xiao-ping Lin...
IPPS
2007
IEEE
14 years 1 months ago
Cluster-dot Screening by Local Exhaustive Search with Hardware Accelaration
Screening is an important task to convert a continuoustone image into a binary image with pure black and white pixels. The main contribution of this paper is to show a new algorit...
Yasuaki Ito, Koji Nakano
IPPS
2007
IEEE
14 years 1 months ago
Implementing Hirschberg's PRAM-Algorithm for Connected Components on a Global Cellular Automaton
The GCA (Global Cellular Automata) model consists of a collection of cells which change their states synchronously depending on the states of their neighbors like in the classical...
Johannes Jendrsczok, Rolf Hoffmann, Jörg Kell...
CAL
2008
13 years 7 months ago
A Parallel Deadlock Detection Algorithm with O(1) Overall Run-time Complexity
This article proposes a novel parallel, hardware-oriented deadlock detection algorithm for multiprocessor system-on-chips. The proposed algorithm takes full advantage of hardware ...
Jaehwan John Lee, Xiang Xiao
FPL
2006
Springer
135views Hardware» more  FPL 2006»
13 years 11 months ago
FPGA Design Considerations in the Implementation of a Fixed-Throughput Sphere Decoder for MIMO Systems
A field-programmable gate array (FPGA) implementation of a new detection algorithm for uncoded multiple inputmultiple output (MIMO) systems based on the complex version of the sph...
Luis G. Barbero, John S. Thompson