462 search results - page 83 / 93 » Parallel algorithm for hardware implementation of inverse ha... |
IEEEPACT
2005
IEEE
14 years 29 days ago
2005
IEEE
Scratchpad memory (SPM), a fast software-managed onchip SRAM, is now widely used in modern embedded processors. Compared to hardware-managed cache, it is more efficient in perfor...
SPAA
2009
ACM
14 years 8 months ago
2009
ACM
We present three new reader-writer lock algorithms that scale under high read-only contention. Many previous reader-writer locks suffer significant degradation when many readers a...
CLUSTER
2002
IEEE
14 years 10 days ago
2002
IEEE
Clusters of workstations have emerged as an important platform for building cost-effective, scalable, and highlyavailable computers. Although many hardware solutions are available...
MICRO
1997
IEEE
13 years 11 months ago
1997
IEEE
Compiler optimizations are often driven by specific assumptions about the underlying architecture and implementation of the target machine. For example, when targeting shared-mem...
ICS
2005
Tsinghua U.
14 years 26 days ago
2005
Tsinghua U.
BlueGene/L is currently the world’s fastest supercomputer. It consists of a large number of low power dual-processor compute nodes interconnected by high speed torus and collect...