462 search results - page 92 / 93 » Parallel algorithm for hardware implementation of inverse ha... |
FPL
2004
Springer
14 years 22 days ago
2004
Springer
Abstract. In this paper, a novel architecture dedicated to image processing is presented. The most original aspect of the approach is the use of a System On Chip implemented in a F...
DAC
2007
ACM
14 years 8 months ago
2007
ACM
Multiprocessor SoC systems have led to the increasing use of parallel hardware along with the associated software. These approaches have included coprocessor, homogeneous processo...
ICS
2010
Tsinghua U.
14 years 4 months ago
2010
Tsinghua U.
We introduce the notion of "non-malleable codes" which relaxes the notion of error-correction and errordetection. Informally, a code is non-malleable if the message cont...
APVIS
2007
13 years 8 months ago
2007
: In this paper, we apply Particle-based Volume Rendering (PBVR) technique using a current programmable GPU architecture. Recently, the increasing programmability of GPU offers an ...
ICDCS
2009
IEEE
14 years 4 months ago
2009
IEEE
While it is well known that network coding achieves optimal flow rates in multicast sessions, its potential for practical use has remained to be a question, due to its high compu...