1515 search results - page 289 / 303 » Parallel computing on any desktop |
HPCA
2009
IEEE
14 years 7 months ago
2009
IEEE
In a Chip Multi-Processor (CMP) with private caches, the last level cache is statically partitioned between all the cores. This prevents such CMPs from sharing cache capacity in r...
HPCA
2009
IEEE
14 years 7 months ago
2009
IEEE
The verification of an execution against memory consistency is known to be NP-hard. This paper proposes a novel fast memory consistency verification method by identifying a new na...
HPCA
2009
IEEE
14 years 7 months ago
2009
IEEE
Realizing scalable cache coherence in the many-core era comes with a whole new set of constraints and opportunities. It is widely believed that multi-hop, unordered on-chip networ...
HPCA
2008
IEEE
14 years 7 months ago
2008
IEEE
Increases in peak current draw and reductions in the operating voltages of processors continue to amplify the importance of dealing with voltage fluctuations in processors. Noise-...
HPCA
2008
IEEE
14 years 7 months ago
2008
IEEE
Interconnection networks-on-chip (NOCs) are rapidly replacing other forms of interconnect in chip multiprocessors and system-on-chip designs. Existing interconnection networks use...