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ICCD
2004
IEEE
125views Hardware» more  ICCD 2004»
14 years 7 months ago
IPC Driven Dynamic Associative Cache Architecture for Low Energy
Existing schemes for cache energy optimization incorporate a limited degree of dynamic associativity: either direct mapped or full available associativity (say 4-way). In this pap...
Sriram Nadathur, Akhilesh Tyagi
SOFSEM
2010
Springer
14 years 7 months ago
Source Code Rejuvenation Is Not Refactoring
Programmers rely on programming idioms, design patterns, and workaround techniques to make up for missing programming language support. Evolving languages often address frequently ...
Peter Pirkelbauer, Damian Dechev, Bjarne Stroustru...
FPGA
2009
ACM
343views FPGA» more  FPGA 2009»
14 years 5 months ago
Fpga-based face detection system using Haar classifiers
This paper presents a hardware architecture for face detection based system on AdaBoost algorithm using Haar features. We describe the hardware design techniques including image s...
Junguk Cho, Shahnam Mirzaei, Jason Oberg, Ryan Kas...
ICDCN
2009
Springer
14 years 5 months ago
Flooding-Assisted Threshold Assignment for Aggregate Monitoring in Sensor Networks
The research community has witnessed a large interest in monitoring large scale distributed systems. In these applications typically we wish to monitor a global system condition wh...
Ali Abbasi, Ahmad Khonsari, Mohammad Sadegh Talebi
ICS
2009
Tsinghua U.
14 years 5 months ago
Dynamic cache clustering for chip multiprocessors
This paper proposes DCC (Dynamic Cache Clustering), a novel distributed cache management scheme for large-scale chip multiprocessors. Using DCC, a per-core cache cluster is compri...
Mohammad Hammoud, Sangyeun Cho, Rami G. Melhem