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IPPS
1998
IEEE
13 years 12 months ago
Optimizing Data Scheduling on Processor-in-Memory Arrays
In the study of PetaFlop project, Processor-In-Memory array was proposed to be a target architecture in achieving 1015 floating point operations per second computing performance. ...
Yi Tian, Edwin Hsing-Mean Sha, Chantana Chantrapor...
IPPS
2006
IEEE
14 years 1 months ago
Using virtual grids to simplify application scheduling
Users and developers of grid applications have access to increasing numbers of resources. While more resources generally mean higher capabilities for an application, they also rai...
Richard Y. Huang, Henri Casanova, Andrew A. Chien
AINA
2008
IEEE
14 years 2 months ago
Multi-Character Processor Array for Pattern Matching in Network Intrusion Detection System
—Network Intrusion Detection System (NIDS) is a system developed for identifying attacks by using a set of rules. NIDS is an efficient way to provide the security protection for ...
Yeim-Kuan Chang, Ming-Li Tsai, Yu-Ru Chung
PEWASUN
2004
ACM
14 years 1 months ago
A modified IEEE 802.11 MAC protocol for MC-CDMA
In this paper, we introduce a modified version of the IEEE 802.11a protocol and evaluate its performance. The new protocol is a combination of the standard Medium Access Control (...
Georgios Orfanos, Jörg Habetha, Ling Liu
IPPS
2006
IEEE
14 years 1 months ago
Empowering a helper cluster through data-width aware instruction selection policies
Narrow values that can be represented by less number of bits than the full machine width occur very frequently in programs. On the other hand, clustering mechanisms enable cost- a...
Osman S. Unsal, Oguz Ergin, Xavier Vera, Antonio G...