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» Parallel fault backtracing for calculation of fault coverage
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ASPDAC
2008
ACM
77views Hardware» more  ASPDAC 2008»
13 years 10 months ago
Parallel fault backtracing for calculation of fault coverage
Raimund Ubar, Sergei Devadze, Jaan Raik, Artur Jut...
TASE
2009
IEEE
14 years 3 months ago
Interpreting a Successful Testing Process: Risk and Actual Coverage
Testing is inherently incomplete; no test suite will ever be able to test all possible usage scenarios of a system. It is therefore vital to assess the implication of a system pas...
Mariëlle Stoelinga, Mark Timmer
DSN
2007
IEEE
14 years 3 months ago
Using Process-Level Redundancy to Exploit Multiple Cores for Transient Fault Tolerance
Transient faults are emerging as a critical concern in the reliability of general-purpose microprocessors. As architectural trends point towards multi-threaded multi-core designs,...
Alex Shye, Tipp Moseley, Vijay Janapa Reddi, Josep...
IPPS
2006
IEEE
14 years 2 months ago
Fault tolerance with real-time Java
After having drawn up a state of the art on the theoretical feasibility of a system of periodic tasks scheduled by a preemptive algorithm at fixed priorities, we show in this art...
Damien Masson, Serge Midonnet
TVLSI
2002
111views more  TVLSI 2002»
13 years 8 months ago
Circular BIST with state skipping
Circular built-in self-test (BIST) is a "test per clock" scheme that offers many advantages compared with conventional BIST approaches in terms of low area overhead, simp...
Nur A. Touba