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» Parallel processor scheduling with delay constraints
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IPCO
1998
152views Optimization» more  IPCO 1998»
14 years 6 days ago
Approximation Bounds for a General Class of Precedence Constrained Parallel Machine Scheduling Problems
Abstract. A well studied and difficult class of scheduling problems concerns parallel machines and precedence constraints. In order to model more realistic situations, we consider ...
Alix Munier, Maurice Queyranne, Andreas S. Schulz
PPOPP
2006
ACM
14 years 4 months ago
Predicting bounds on queuing delay for batch-scheduled parallel machines
Most space-sharing parallel computers presently operated by high-performance computing centers use batch-queuing systems to manage processor allocation. In many cases, users wishi...
John Brevik, Daniel Nurmi, Richard Wolski
ICCAD
2006
IEEE
131views Hardware» more  ICCAD 2006»
14 years 7 months ago
High-level synthesis challenges and solutions for a dynamically reconfigurable processor
A dynamically reconfigurable processor (DRP) is designed to achieve high area efficiency by switching reconfigurable data paths dynamically. Our DRP architecture has a stand alone...
Takao Toi, Noritsugu Nakamura, Yoshinosuke Kato, T...
ICCD
2006
IEEE
126views Hardware» more  ICCD 2006»
14 years 7 months ago
Task Merging for Dynamic Power Management of Cyclic Applications in Real-Time Multi-Processor Systems
—In this paper we propose the method of task merging and idle period clustering for dynamic power management (DPM) in a real-time system with multiple processing elements. We sho...
Shaobo Liu, Qinru Qiu, Qing Wu
IPPS
1998
IEEE
14 years 3 months ago
Scheduling with Communication Delays and Data Routing in Message Passing Architectures
This work deals with the scheduling problem of a directed acyclic graph with interprocessor communication delays. The objective is to minimize the makespan, taking into account the...
Aziz Moukrim, Alain Quilliot