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» Parallel signal processing with S-Net
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IPPS
2002
IEEE
14 years 10 days ago
A SIMD Vectorizing Compiler for Digital Signal Processing Algorithms
Short vector SIMD instructions on recent microprocessors, such as SSE on Pentium III and 4, speed up code but are a major challenge to software developers. We present a compiler t...
Franz Franchetti, Markus Püschel
NIPS
2001
13 years 8 months ago
Stochastic Mixed-Signal VLSI Architecture for High-Dimensional Kernel Machines
A mixed-signal paradigm is presented for high-resolution parallel innerproduct computation in very high dimensions, suitable for efficient implementation of kernels in image proce...
Roman Genov, Gert Cauwenberghs
ISCAS
2011
IEEE
342views Hardware» more  ISCAS 2011»
12 years 10 months ago
Parallel Dynamic Voltage and Frequency Scaling for stream decoding using a multicore embedded system
—Parallel structures may be used to increase a system processing speed in case of large amount of data or highly complex calculations. Dynamic Voltage and Frequency Scaling (DVFS...
Ying-Xun Lai, Yueh-Min Huang, Chin-Feng Lai, Ljilj...
ICASSP
2011
IEEE
12 years 11 months ago
A methodology based on Transportation problem modeling for designing parallel interleaver architectures
For high-data-rate applications, turbo-like iterative decoders are implemented with parallel hardware architecture. However, to achieve high throughput, concurrent accesses to each...
Awais Sani, Philippe Coussy, Cyrille Chavet, Eric ...
ICASSP
2011
IEEE
12 years 11 months ago
Parallel Transformation Network features for speaker recognition
The use of speaker adaptation transforms as features for speaker recognition is an appealing alternative to conventional short-term cepstral features. In general, this kind of met...
Alberto Abad, Jordi Luque, Isabel Trancoso