770 search results - page 28 / 154 » Parallel simulation of chip-multiprocessor architectures |
EUROPAR
2008
Springer
13 years 10 months ago
2008
Springer
Abstract. A parallel Lattice Boltzmann Method (pLBM), which is based on hierarchical spatial decomposition, is designed to perform large-scale flow simulations. The algorithm uses ...
IPPS
2005
IEEE
14 years 2 months ago
2005
IEEE
With the increasing availability of high-performance massively parallel computer systems, the prevalence of sophisticated scientific simulation has grown rapidly. The complexity ...
SBACPAD
2008
IEEE
14 years 2 months ago
2008
IEEE
Single processor technology has been evolving across last decades, but due to physical limitations of chip manufacturing process, the industry is pursuing alternatives to sustain ...
MASCOTS
2010
13 years 10 months ago
2010
Abstract--We present Barra, a simulator of Graphics Processing Units (GPU) tuned for general purpose processing (GPGPU). It is based on the UNISIM framework and it simulates the na...
ICPP
2008
IEEE
14 years 2 months ago
2008
IEEE
The slow speed of conventional execution-driven architecture simulators is a serious impediment to obtaining desirable research productivity. This paper proposes and evaluates a f...