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» Parallel simulation of chip-multiprocessor architectures
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IPPS
2003
IEEE
14 years 1 months ago
The CoGenT Project: Co-Generating Compilers and Simulators for Dynamically Compiled Languages
To understand the performance of modern Java systems one must observe execution in the context of specific architectures. It is also important that we make these observations usi...
J. Eliot B. Moss, Charles C. Weems, Timothy Richar...
MVA
1994
113views Computer Vision» more  MVA 1994»
13 years 9 months ago
A Modified Simulation Environment for Reconfigurable Multicomputer Systems in Digital Image Processing Applications
In our work we improve the EPPI programming environment, which was made in the University of Castilla - la Mancha one year ago. EPPI is a tool for simulating parallel algorithms t...
Francisco J. Quiles, Antonio Jose Garrido del Solo
IPPS
2007
IEEE
14 years 2 months ago
A General Purpose Partially Reconfigurable Processor Simulator (PReProS)
An innovative technique to model and simulate partial and dynamic reconfigurable processors is presented in this paper. The basis for development is a SystemC kernel modified for ...
Alisson Vasconcelos De Brito, Matthias Kühnle...
EUROPAR
1999
Springer
14 years 24 days ago
Consequences of Modern Hardware Design for Numerical Simulations and Their Realization in FEAST
This paper deals with the influence of hardware aspects of modern computer architectures to the design of software for numerical simulations. We present performance tests for vari...
Christian Becker, Susanne Kilian, Stefan Turek
CDES
2009
170views Hardware» more  CDES 2009»
13 years 9 months ago
Benchmarking GPU Devices with N-Body Simulations
Recent developments in processing devices such as graphical processing units and multi-core systems offer opportunities to make use of parallel techniques at the chip level to obt...
Daniel P. Playne, Mitchell Johnson, Kenneth A. Haw...