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» Parallel simulation of chip-multiprocessor architectures
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108
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HPCA
2002
IEEE
16 years 3 months ago
Microarchitectural Simulation and Control of di/dt-induced Power Supply Voltage Variation
As the power consumption of modern highperformance microprocessors increases beyond 100W, power becomes an increasingly important design consideration. This paper presents a novel...
Ed Grochowski, David Ayers, Vivek Tiwari
113
Voted
HIPC
2004
Springer
15 years 9 months ago
Performance Characteristics of a Cosmology Package on Leading HPC Architectures
Abstract. The Cosmic Microwave Background (CMB) is a snapshot of the Universe some 400,000 years after the Big Bang. The pattern of anisotropies in the CMB carries a wealth of info...
Jonathan Carter, Julian Borrill, Leonid Oliker
IPPS
2009
IEEE
15 years 10 months ago
Throughput-fairness tradeoff in Best Effort flow control for on-chip architectures
We consider two flow control schemes for Best Effort traffic in on-chip architectures, which can be deemed as the solutions to the boundary extremes of a class of utility maximi...
Fahimeh Jafari, Mohammad Sadegh Talebi, Mohammad H...
IPPS
2007
IEEE
15 years 9 months ago
A Landmark-based Index Architecture for General Similarity Search in Peer-to-Peer Networks
The indexing of complex data and similarity search plays an important role in many application areas. Traditional centralized index structure can not scale with the rapid prolifer...
Xiaoyu Yang, Yiming Hu
154
Voted
EH
2004
IEEE
117views Hardware» more  EH 2004»
15 years 7 months ago
Multi-objective Optimization of a Parameterized VLIW Architecture
The use of Application Specific Instruction-set Processors (ASIP) in embedded systems is a solution to the problem of increasing complexity in the functions these systems have to ...
Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi,...